Guiming Shi obtained his bachelor’s degree from Electrical Engineering and Automation in the department of electrical engineering, Tsinghua University and is pursuing his M.S. degree in IIIS, Tsinghua University. His research interests are computer architecture and FPGA design for financial application. He is a veteran college student who served in the Navy, during which he won the excellent soldier twice. Since 2020, he has joined ARChip Lab as an AI Chip team member under the supervision of Prof. Kaisheng Ma.

Yuchen Wei achieved his B.S. degree at IIIS, Tsinghua University. Now he is pursuing his Ph.D. degree in ARChip Lab.He has a broad interest in computer architecture and hardware design, which leads to his current research direction on computer architecture, hardware-software co-design for neural networks computation and chip architecture design for edge AI applications. He is now focusing on algorithms on energy-efficient software mapping for executing neural networks on chiplets.

Xuan Wang graduated from Xi'an Jiaotong University with a bachelor's degree in Computer Science from the School of Electronic and Information Engineering. During his undergraduate years, he studied in Qian Xuesen Class and was ranked in the top three in his major. He also received several National Scholarships from the Ministry of Education. He has a mixed background and experience in various fields, such as Artificial Intelligence, Architecture, SLAM, and Software Defined Networks. In 2022, He joined ARChip Lab as a member of the AI chip team under the guidance of Prof. Kai-Sheng Ma. He has a wide range of interests in Computer Architecture, including 3D ICs, Software and Hardware Co-design for Heterogeneous Computing, Advanced Packaging, etc.

Zijian Zhu achieved his bachelor's degree at IIIS, Tsinghua University. Now, he is pursuing his Ph.D. degree in ARChip Lab. He was born in Beijing, China. During his high school study, he participated in Olympiad in Informatics and won the gold medal of NOI2018. He has a mixed background in algorithm design and computer architecture. And he had some projects of scheduling on the DNN accelerator. His research interests are computer architecture, hardware-software co-design for neural network computation, and algorithm design for hardware.

Yinxiao Feng is now pursing his Ph.D. degree in IIIS, Tsinghua University. During his Bachelor’s degree in Shanghai JiaoTong University, he majored in Information Engineering (AI direction) and a double degree in Mathematics and Applied Mathematics. He was also a member of Zhiyuan Honors Program of Engineering, which consists of the top 5% students of all engineering students at SJTU. During his undergraduate years, he won many distinctive awards and honors, including national scholarship. He has a mixed background and experiences in materials, devices, circuits, algorithms, and hardware. He even has experience of clean room fabrication. He is now participating a team in ARChip Lab, inventing a next-generation single cell level human machine interface.

Zehua Li received his B.S degree at Department of Microelectronics from Xi’an Jiaotong University. During his bachelor period, he studied in Qian Xuesen Class and ranked the first among students majoring in microelectronics. He also won awards in different contests, including Mathematical Modeling and Mechanics Competition, and got a patent about computer architecture. He used to study as a visiting student of University of California, Berkeley, during which period he participated in the project of RISC-V CPU-design and Discriminator design. His is interested in computer architecture and digital circuit design, especially edge AI chips related to loT.

Jingwei Cai earned his B.S. degree in Integrated Circuit and System Design from the University of Electronic Science and Technology of China. During his undergraduate studies, he achieved a weighted average score of 95.3, ranking first in his department and breaking the record in the university. He was also awarded the title of Outstanding Student of UESTC (a distinction granted to only ten graduates each year, similar to the Tsinghua Special Award), and received more than ten scholarships including three National Scholarships. Since 2021, he has been pursuing his Ph.D. at Tsinghua University's IIIS ARCHIPLAB, with research interests primarily focused on chiplet architecture, multicore DNN accelerator architecture and compilation, silicon photonics wafer-scale computing architecture, and recommendation system acceleration. His publications are available on his Google Scholar site: https://scholar.google.com/citations?hl=en&user=OSxlefIAAAAJ. Looking towards a future in the industry, he is currently seeking internship and job opportunities. Interested parties can contact him at: 1148821791@qq.com.

Zuotong Wu is an undergraduate student at IIIS, Tsinghua University. He was born in Fuzhou, Fujian, China. In his high school years, he put his efforts on Olymiad in Informatics and got a gold medal on NOI2018. In his junior year in Tsinghua, he became interested in computer architecture and joined the team. He is now working on efficient alorighms to find energy-saving mapping schemes on chiplets.

Sen Peng achieved his B.S. degree at the University of Electronic Science and Technology of China. In ARChip Lab, he is pursuing Master Degree in chip team. With a bachelor background of software engineering, he has a broad interest in system software and hardware-software co-design. Currently, he is focusing on software mapping for NPU. In daily life, he has a great passion for fitness which he believes can contribute to his research.

Qichao Ma received his B.S. degree in Telecommunications form XiDian University in 2015 and M.S. degree in Electronics from Polytech Nice Sophia, France in 2018. In 2018, he has worked on IC design as an intern in Ethertronics SAS France for six months. Since 2019, He has joined ARChip lab to conduct research on Silicon Neural Component Dust. His current research focuses on ultrasound imaging, backscattering communication, energy harvesting and radio frequency integrated circuit design for energy harvesting and backscattering communication.